This invention relates to a semiconductor integrated circuit device (hereinafter simply referred to as an "IC") including an I.sup.2 L (Integrated Injection Logic) element portion having an inverse transistor and a bipolar circuit element portion having a normal transistor. Further, this invention also relates to a method of fabricating the IC.
The term "inverse transistor" herein denotes a transistor having a structure in which a semiconductor body such as a semiconductor substrate or a semiconductor layer (epitaxial layer) is used as its emitter region, a first semiconductor region formed in the semiconductor body is used as the base region and a second semiconductor region formed in the first semiconductor region is used as the collector region. On the other hand, the term "normal transistor" herein denotes a transistor having a structure in which the above-mentioned second semiconductor region is used as the emitter region, the above-mentioned first semiconductor region is used as the base region and the above-mentioned semiconductor body is used as the collector region.
When an I.sup.2 L element and a linear or digital circuit element are to be separately disposed on a common epitaxial layer, a drawback develops with regard to the respective element characteristics. Specifically, the current amplification factor .beta..sub.i of the inverse transistor of the I.sup.2 L element increases with a decreasing thickness of the epitaxial layer. However, the collector-to-emitter or collector-to-base withstand voltage in the linear circuit element having a normal vertical transistor structure increases with an increasing thickness of the epitaxial layer. Therefore, in order to have both elements present together on a common epitaxial layer, it becomes necessary to sacrifice either the current amplification factor or the withstand voltage insofar as the thickness of the epitaxial layer is uniform.